|
MythSim Microcode Language Quick Reference |
|||
|
Register Set |
|||
|
a_sel=n |
Place the value in register n (0-7) on the a_bus. |
||
|
b_sel=n |
Place the value in register n (0-7) on the b_bus. |
||
|
ri_sel |
Store result in the register defined in ir_ri. |
||
|
rj_sel |
Place the value in the register defined by ir_rj on the a_bus. |
||
|
rk_sel |
Place the value in the register defined by ir_rk on the b_bus. |
||
|
rn_write |
Store the result_bus value into register n (0-7). |
||
|
Arithmetic Logic Unit |
|||
|
alu_sel= |
NOT |
NOT(a_bus) => alu_bus |
|
|
|
OR |
OR(a_bus, b_bus) => alu_bus |
|
|
|
AND |
AND(a_bus, b_bus) => alu_bus |
|
|
|
XOR |
XOR(a_bus, b_bus) => alu_bus |
|
|
|
ADD |
a_bus + b_bus + c_in => alu_bus |
|
|
|
SUB |
a_bus + NOT(b_bus) + c_in => alu_bus |
|
|
|
ADDA |
a_bus + c_in => alu_bus |
|
|
|
SUBA |
a_bus -1 + c_in => alu_bus |
|
|
c_in |
Set the c_in to 1 for use by ALU operations (4-7). |
||
|
Memory Interface |
|||
|
result_sel= |
ALU |
Place the alu_bus value on the result_bus. |
|
|
|
MDR |
Place the mdr value on the result_bus. |
|
|
|
IR_CONST4 |
Place ir_const4 on the result_bus. (ir_const4 = last 4 bits of ir0) |
|
|
|
IR_CONST8 |
Place ir_const8 on the result_bus. (ir_const8 = all 8 bits of ir0) |
|
|
ir0_sel= |
LOAD |
Load the value on the memory_bus into ir0 (Instruction Register 0). |
|
|
ir1_sel= |
LOAD |
Load the value on the memory_bus into ir1 (Instruction Register 1). |
|
|
mar_sel= |
LOAD |
Load the value on the alu_bus into the mar (Memory Address Register). |
|
|
mdr_sel= |
LOAD_ALU |
Load the value on the alu_bus into the mdr (Memory Address Register). |
|
|
LOAD_MEM |
Load the value on the memory_bus into the mdr (Memory Data Register). |
||
|
read |
Place the value at the main memory address mar on the memory_bus. |
||
|
write |
Write the value of mdr to the main memory location mar. |
||
|
Control Structures |
|||
|
goto label |
Jump to the given label. |
||
|
if status_line then |
If the value of status_line=1 then goto label_1 else goto label_2. |
||
|
status_line |
Description |
||
|
m_7 |
most significant bit from alu_bus |
||
|
c_out |
carry bit from the alu_bus |
||
|
v |
overflow bit from the ALU |
||
|
wait |
wait signal from Main Memory |
||
|
Control Unit Diagram |
|
|
|
Datapath Diagram |
|
|